(Solved): Registers A, B, C, and D share a bus system as shown in the image linked below (Q3.pdf). In the or ...

Registers A, B, C, and D share a bus system as shown in the image linked below (Q3.pdf). In the original circuit, the input selectors \( \mathrm{S} 1 \) and \( \mathrm{S} 0 \) are directly connected to two 2 -to-4 decoders \( X \) and \( Y \), which will each choose one of the registers \( A, B, C \), or \( D \) through the enable signals of the tristate buffers. The bits 0 and 1 of the selected registers will be then transferred through separated bus lines (labeled as "Bus line for bit 0/ Bus line for bit 1"). The original circuit (as described above), was modified so that a "combinational circuit", with an additional input MODE, was introduced to allow two modes of operation. When operating in MODE 0 , the modified circuit behaves exactly as the original circuit. When operating in MODE 1, the operation of the circuit is as the following pattern: 1. When \( \mathrm{S} 1=0 \), and \( \mathrm{SO}=0 \) : "Bus line for bit 0" will transfer the bit 0 of register \( \mathrm{A} \), while "Bus line for bit 1 " will transfer the bit 1 of register \( \mathrm{D} \). 2. When \( S 1=0 \), and \( S 0=1 \) : "Bus line for bit 0 " will transfer the bit 0 of register B, while "Bus line for bit 1 " will transfer the bit 1 of register \( C \). 3. When \( \mathrm{S} 1=1 \), and \( \mathrm{S}=0 \) : "Bus line for bit 0" will transfer the bit 0 of register \( C \), while "Bus line for bit 1 " will transfer the bit 1 of register B. 4. When \( \mathrm{S} 1=1 \), and \( \mathrm{S} 0=1 \) : "Bus line for bit 0" will transfer the bit 0 of register D, while "Bus line for bit 1" will transfer the bit 1 of register \( \mathrm{A} \). (At any given moment, you can assume that the enable input \( \mathrm{E} \) is fixed at logic "1" for both original and modified circuits.) For the modified circuit as described, what would be the minimum form of the Boolean expressions for S1X, SOX, S1Y, and S0Y? Q3-1.pdf \( \downarrow \) \[ \begin{array}{l} S 1 X=S 1, S O X=S O, S 1 Y=X O R(M O D E, S 1), S O Y=X O R(M O D E, S O) \\ S 1 X=S 0, S O X=S 1, S 1 Y=X O R(M O D E, S O), S O Y=X O R(M O D E, S 1) \\ S 1 X=S 1, S O X=S O, S 1 Y=X O R(M O D E, S 0), S O Y=X O R(M O D E, S 1) \\ S 1 X=S O, S O X=S 1, S 1 Y=X O R(M O D E, S O), S O Y=X O R(S O, S 1) \end{array} \] Original Circuit: Modified Circuit: