EE178: Digital Principles
Exercise 4: Combinational logic design.
Handed out on: March 14. Hand in by: April 4. Please solve in an organized manner. Points will be reduced for unorganized and difficult-to-read solutions.
In this question you will implement a system (similar to the ALU discussed in class) that receives as input 3 variables
A,B,C, each variable consisting of
k bits, and a flag variable
F consisting of 2 bits; and outputs a
k bit variable
Y based on the following rules. In what follows,
A,B,C, and
Y are considered to be in 2's complement form with
k bits and
|x| stands for the absolute value of
x.
(a) If
F=00 then the output
Y will compare between the values
|A-(B-C)| and
|A-B|-|C|. Namely
Y=000dots000 if
|A-(B-C)|>=|A-B|-|C| and
Y=111dots111 otherwise.
(b) If
F=01 then the output
Y will be equal to the largest input among
A,B, and
C (in 2's complement form). For example, if
A<=B<=C then
Y will be equal to
C. Ties can be broken arbitrarily.
(c) If
F=10 then the output
Y will be equal to the product of
A_([20]) and
B_([20]). Here, |) and are the 3 least significant bits of
A and
B respectively (you may assume
k>=3 ). In this case, the values of
A_([20]),B_([20]), and
Y are considered to be in standard binary form.
(d) If
F=11 then the output
Y will be the logical shift of
A to the left
Z positions, where
Z is a value between 0 and 3 obtained by adding up the least significant bits of
A,B, and
C. For example, if the least significant bit of
A is 0 , the least significant bit of
B is 1 , and the least significant bit of
C is 1 ; then
Y should be the logical shift of
A to the left 2 positions (as
2=0 1 1 ).
Construct a circuit that performs the above functionality. Draw the circuit in an organized and readable manner. Up to 50 points will be reduced for solutions that are unorganized and difficult to understand. It is recommended to present the circuit in a modular manner (see figure below). In your circuits, you may use standard gates, MUXs, Decoders, full adders, k-bit adders, k-bit subtractors,
k-bit comparators, and the
k-bit absolute-value circuit from class.
My circuit
and sean -
Figure 1: A modular representation of the circuit. The main circuit ("My circuit" on the left) is presented using a number of components, and each component is presented separately in detail.
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