(Solved): (d) The schematic diagram of a MOSFET bias voltage generation circuit is shown below. The gate leng ...

(d) The schematic diagram of a MOSFET bias voltage generation circuit is shown below. The gate lengths of both transistors are the same and equal to the minimum length for this technology \\( L_{1}=L_{2}=L_{\\min } \\) and the magnitude of the threshold voltage is \\( \\left|V_{T}\\right|=1 \\mathrm{~V} \\). Channel length modulation can be neglected and the same process is used for both transistors. Please answer the following questions: i) derive an expression for the output voltage \\( V_{o} \\) in terms of the supply and threshold voltages of the transistors and the ratio of the channel widths. Clearly state all assumputions. ii) hence or otherwise, design a MOSFET bias voltage generation circuit to output \\( 3 \\mathrm{~V} \\), where all transistor widths are expressed as integral multiples of the minimum length \\( W_{1}=N_{1} L_{\\min } \\) where \\( N_{1} \\in \\mathbb{N} \\). Verify all assumptions.