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(Solved): bjective: Design a VHDL code for Adder/ Subtractor using 4-bit numbers. Details the design: Ripple ...
bjective: Design a VHDL code for Adder/ Subtractor using 4-bit numbers. Details the design: Ripple Carry Adder/ Subtractor 1- If S (Select) equal to 0 the circuit will work as adder. 2- If S (Select) equal to 1 the circuit will work as substractor. 3- Built these circuit using structure Modeling (half adder, full adder, ...etc). Submission: submit the .vhd and . Wht files of your design and the (testbench). In addition to files submit the screen shots of the conducted design and testbench.
Expert Answer
SOLUTION: SOURCE CODE: FULL ADDER library ieee; use ieee.std_logic_1164.all; entity Full_Adder is port( X, Y, Cin : in std_logic; sum, Cout : out std_logic); end Full_Adder; architecture bhv of Full_Adder is begin