(8 points) Consider the BCD to Seven-Segment Decoder design, shown on Page 14 of the "Digital Logic Fundamentals, Part 2" lecture notes. Using K-maps, obtain a minimum SOP form for the outputs corresponding to the LED segments d, e, and f; then, in the "Q1" subcircuit, implement this logic using only AND, OR, and NOT gates.

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(8 points) Consider the BCD to Seven-Segment Decoder design, shown on Page 14 of the &#34;Digital Logic Fundamentals, Part 2&#34; lecture notes.  Using K-maps, obtain a minimum SOP form for the outputs corresponding to the LED segments d, e, and f; then, in the &#34;Q1&#34; subcircuit, implement this logic using only AND, OR, and NOT gates.

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